1. Field of the Invention
The present invention relates to a data transfer circuit, a solid-state imaging device represented by a CMOS image sensor and a camera system including plural data from which transfer data can be selected on a bus and having a function of receiving transferred data at a bus end.
2. Description of the Related Art
A data bus system including plural data from which transfer data can be selected on a bus and reading the transferred data by a sense amplifier circuit arranged at a bus end is used as a data transfer circuit for a memory and the like.
Generally, in this type of data transfer circuit, there exist a case of reading data close to the sense amplifier circuit and a case of reading data far from the sense amplifier circuit, and the distance through which data is transferred differs according to data to be selected.
This type of data transfer circuit is applied to a CMOS image sensor as a solid-state imaging device (image sensor) and the like.
A CMOS image sensor can use the same manufacturing process as a common CMOS-type integrated circuit in manufacturing the sensor. In addition, the sensor can be driven by a single power supply, and the sensor can include an analog circuit and a logic circuit using the CMOS process in a same chip.
Therefore, the CMOS image sensor has plural significant advantages such that the number of peripheral ICs can be reduced.
As an output circuit of a CCD, one-channel (ch) output using a FD amplifier including a floating diffusion (FD) layer is the mainstream.
On the other hand, the CMOS image sensor has FD amplifiers with respect to respective pixels, and column-parallel output is the mainstream, in which a certain row in a pixel array is selected and data of the row is read in a column direction at a time.
This is because it is difficult to obtain sufficient drive performance by the FD amplifiers arranged in pixels, thus, it is necessary to reduce the data rate, therefore, parallel processing is advantageous.
Various signal output circuits for the column-parallel output type CMOS image sensor are actually proposed.
As one of advanced forms of the circuit, there exists a circuit including an analog-digital converter (hereinafter, abbreviated as ADC) with respect to each column to take pixel signals as digital signals.
The CMOS image sensor including column-parallel type ADCs as described above is disclosed in, for example, “An Integrated 800×600 CMOS Image System” ISSCC Digest of Technical Papers, pp. 304-305, February, 1999 written by W. Yang et. Al., (Non-Patent Document 1) and JP-A-2005-323331 (Patent Document 1).
As described above, the column-parallel reading system may be applied to the solid-state imaging device (CMOS image sensor).
Therefore, in the CMOS image sensor, scanning in the row direction (vertical scanning) is performed at extremely low speed, whereas scanning in the column direction (horizontal scanning) will be performed at extremely high speed because all data of one row should be read out during a period of 1 H (horizontal scanning).